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CM3109 2A Sink/Source Regulator for Front Side Bus and DDR Memory Bus Termination
Features
* * * * * * * * * * Ideal for both PC Front Side Bus and DDR memory VTT applications Sinks and sources 2A Over current protection Over temperature protection Shutdown function Integrated power MOSFETs Excellent accuracy (0.5% of load regulation) Minimum external components 8 pin PSOP package Lead-free version available
Product Description
The CM3109 is a sinking and sourcing regulator specifically designed for series-parallel bus termination for high speed chip set buses as well as DDR memory systems. It can source and sink current up to 2A with high accuracy of 0.5 %. The VTT output voltage is selectable by VDDQSEL and FSBSEL pins. The VDDQSEL pin controls whether the CM3109 is in DDR memory mode with VTT = VDDQ/2, or in FSB mode. In FSB mode, FSBSEL controls whether VTT is 1.225V or 1.45V. This allows the same chip to be used in two different circuits on PC motherboards that support both Northwood and Prescott processors. The CM3109 requires no external components to use the GMCH Enable signal in Intel chipset or corresponding signals for other chip sets when powering up the PC. For the boards which support Suspend to RAM (STR) functionality, CM3109 provides a shutdown (SD) pin. When SD is set low, VTT will be in tri-state mode, causing the output to go high impedance. In this mode, CM3109 power is saved by significantly reducing the quiescent current. The CM3109 provides over current and over temperature protection. These features protect the chip from excessive heating due to high current and high temperature. The CM3109 is housed in an 8-pin PSOP package and is available with optional lead-free finishing.
Applications
* * * * PC Front Side Bus termination regulator DDR Memory termination regulator Active termination buses Graphics card DDR memory termination
Simplified Electrical Schematic
VCC
VDDQSEL FSBSEL
VDDQ
50K
Output Select
SD
Over Temp Over Current Reference
Driver
VTT
50K
VSENSE
GND
(c) 2004 California Micro Devices Corp. All rights reserved. 01/15/04
430 N. McCarthy Blvd., Milpitas, CA 95035-5112 Tel: 408.263.3214
Fax: 408.263.7846
www.calmicro.com
1
CM3109
PACKAGE / PINOUT DIAGRAM
TOP VIEW
VDDQ VTT SD VSENSE
1 2 3 4 8 7 6 5
GND
VCC VDDQSEL GND FSBSEL
8-lead PSOP
Note: This drawing is not to scale.
PIN DESCRIPTIONS
LEAD(S) 1 2 3 4 5 6 7 8 NAME VDDQ VTT SD VSENSE FSBSEL GND VDDQSEL VCC DESCRIPTION Input Voltage VDDQ Outputs either 1.225V/1.45V FSB or VDDQ/2 DDR (See note 1) Shutdown input Feedback voltage input Select input for FSB output. Selects either VTT=1.225V or 1.45V. GROUND Select input for DDR/FSB Output Power for control blocks
Note 1: Assumes VDDQ and VDDQSEL are tied together in DDR application.
Ordering Information
PART NUMBERING INFORMATION
Standard Finish Leads 8 Package PSOP-8 Ordering Part Number1 CM3109-00SB Part Marking CM3109-00SB Lead-free Finish Ordering Part Number1 CM3109-00SH Part Marking CM3109-00SH
Note 1: Parts are shipped in Tape & Reel form unless otherwise specified.
(c) 2004 California Micro Devices Corp. All rights reserved.
2
430 N. McCarthy Blvd., Milpitas, CA 95035-5112 Tel: 408.263.3214
Fax: 408.263.7846
www.calmicro.com
01/15/04
CM3109
Specifications
ABSOLUTE MAXIMUM RATINGS
PARAMETER VCC Operating Supply Voltage VDDQ Input Voltage Pin Voltages VTT Output Any other pins Storage Temperature Range Operating Temperature Range Ambient Junction Power Dissipation (See note 1) RATING 7 7 7 7 -40 to +150 -45 to +85 -45 to +150 Internally Limited UNITS V V V V C C C W
Note 1: These devices must be derated based on thermal resistance at elevated temperatures. The CM3109-xxSB/ must be derated at JA = 40C/W . Please consult with factory for thermal evaluation assistance.
STANDARD OPERATING CONDITIONS
PARAMETER VDDQ, VDDQ Ambient Operating Temperature COUT VALUE 2.5 25 220 20% UNITS V C F
(c) 2004 California Micro Devices Corp. All rights reserved. 01/15/04
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
Tel: 408.263.3214
Fax: 408.263.7846
www.calmicro.com
3
CM3109
Specifications (cont'd)
ELECTRICAL OPERATING CHARACTERISTICS (SEE NOTE 1)
SYMBOL VIN PARAMETER Input Voltage Range VDDQ VCC VCC Quiescent Current Output Voltage IVTT = 0A IVTT = 0A, VDDQ = 2.5V, VDDQSEL= "1" = 2.5V VDDQSEL="0", FSBSEL="0" VDDQSEL = "0", FSBSEL = "1" IVTT = 0A, VDDQ = 3.3V, VDDQSEL="0", FSBSEL="0" VDDQSEL = "0", FSBSEL = "1" VRLOAD CLVTT VFSBSEL Load Regulation VTT Current Limit Output Selection Logic (FSBSEL) Logic "1" Level Logic "0" Level Shutdown Logic Logic "1" Level Logic "0" Level Shutdown Temperature Thermal Hysteresis 1.5 0.4 1.5 0.4 150 30 0A < IVTT < 2.0A or 0A < IVTT < -2.0A 1.225 1.200 1.425 CONDITIONS MIN 2.2 2.2 TYP 2.5 2.5 450 1.250 1.275 1.225 1.250 1.450 1.475 MAX VCC 5.5 UNITS V V A V V V V
ICC VTT
1.200 1.425
1.225 1.250 1.450 1.475 6.25 2.5
V V mV A V V V V C C
VSD
TDISABLE THYST
Note 1: Operating Characteristics are over Standard Operating Conditions unless otherwise specified.
(c) 2004 California Micro Devices Corp. All rights reserved.
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430 N. McCarthy Blvd., Milpitas, CA 95035-5112 Tel: 408.263.3214
Fax: 408.263.7846
www.calmicro.com
01/15/04
CM3109
Performance Information
Typical DC Characteristics (nominal conditions unless otherwise specified)
Figure 1. Output Voltage with VCCSupply (VDDQ=2.5V)
Figure 3. Reference Voltage with VCC Supply (VDDQ=2.5V)
Figure 2. Load Regulation (Sink)
Figure 4. Load Regulation (Source)
(c) 2004 California Micro Devices Corp. All rights reserved. 01/15/04
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
Tel: 408.263.3214
Fax: 408.263.7846
www.calmicro.com
5
CM3109
Performance Information (cont'd)
Typical DC Characteristics (nominal conditions unless otherwise specified)
Figure 5. Over Current Limit (Sink)
Figure 7. Over Current Limit (Source)
Figure 6. Output Voltage with VCC Supply Voltage (VDDQSEL = 0V, FSBSEL = 0V)
Figure 8. Output Voltage with VCC Supply Voltage (VDDQSEL = 0V, FSBSEL = 2.5V)
(c) 2004 California Micro Devices Corp. All rights reserved.
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430 N. McCarthy Blvd., Milpitas, CA 95035-5112 Tel: 408.263.3214
Fax: 408.263.7846
www.calmicro.com
01/15/04
CM3109
Performance Information (cont'd)
Typical DC Characteristics (nominal conditions unless otherwise specified)
Figure 9. VCC Supply Current with Supply Voltage
Typical Transient Characteristics (nominal conditions unless otherwise specified)
Figure 10. Load Transient (0A to 1.5A Sink)
Figure 11. Line Transient (0A to 1.5A Source)
(c) 2004 California Micro Devices Corp. All rights reserved. 01/15/04
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
Tel: 408.263.3214
Fax: 408.263.7846
www.calmicro.com
7
CM3109
Performance Information (cont'd)
Typical Thermal Characteristics The overall junction to ambient thermal resistance ( JA) for device power dissipation (PD) consists primarily of two paths in series. The first path is the junction to the case (JC) which is defined by the package style, and the second path is case to ambient ( CA) thermal resistance which is dependent on board layout. The final operating junction temperature for any set of conditions can be estimated by the following thermal equation: TJUNC = TAMB + PD ( JC) + PD ( CA) = TAMB + PD (JA) When a CM3109-00SB/SH (PSOP) is mounted on a double sided printed circuit board with two square inches of copper allocated for "heat spreading", the resulting JA is 40C/W. Based on the over temperature limit of 150C with an ambient of 85C, the available power of this package will be: PD = (150C -85C) / 40C/W = 1.625W DDR Memory Application Since the output voltage is 1.25V, and the device can either source current from VDDQ or sink current to Ground, the power dissipated in the device at any time is 1.25V times the current load. This means the maximum average RMS current (in either direction) is 1.3A for CM3109-00SB/SH. The maximum instantaneous current is specified at 2A, so this condition should not be exceeded 65% of the time. It is highly unlikely in most usage of DDR memory that this might occur, because it means the DDR memory outputs are either all high or all low for 65% of the time. If the ambient temperature is 40C instead of 85C, which is typically the maximum in most DDR memory applications, the power dissipated (PD) can be 2.75W. So the maximum RMS current increases from 1.3A to 2.2A. Thus, the maximum continuous current can be 2A all the time.
Figure 12. Duty Cycle vs. Ambient Temperature (ILOAD = 2A)
Figure 13. Duty Cycle vs. Output Current (Temp=70C)
(c) 2004 California Micro Devices Corp. All rights reserved.
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430 N. McCarthy Blvd., Milpitas, CA 95035-5112 Tel: 408.263.3214
Fax: 408.263.7846
www.calmicro.com
01/15/04
CM3109
Performance Information (cont'd)
Typical Thermal Characteristics (cont'd) Front Side Bus Application If the CM3109-00SB/SH is instead used for the Front Side Bus application, where VDDQ could be connected to the 3.3V VCC rail for ease of connectivity, the power dissipated will increase to [3.3V-1.4V] = 1.9V times the sourcing current, or [1.4V - 0V] = 1.4V times the sinking current. So the worst case is with all FSB outputs low for a period of time, such that the maximum average source current at an ambient of 40C is [2.75W / 1.9V] = 1.45A. If this average current is exceeded, the device will go over-temperature and the output will drop to 0V. The theoretical calculations of these relationships show the safe operating area of the CM3109 in the PSOP package. Thermal characteristics were measured using a double sided board with two square inches of copper area connected to the GND pins for "heat spreading". Measurements showing performance up to a junction temperature of 150C were performed under light load conditions (5mA). This allows the ambient temperature to be representative of the internal junction temperature. Note: The use of multi-layer board construction with separate ground and power planes will further enhance the overall thermal performance.
Figure 15. Output Voltage vs. Ambient Temperature (ILOAD=5mA)
Figure 14. Reference Voltage vs. Temperature
Figure 16. Quiescent Current vs. Temperature
(c) 2004 California Micro Devices Corp. All rights reserved. 01/15/04
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
Tel: 408.263.3214
Fax: 408.263.7846
www.calmicro.com
9
CM3109
Application Information
PCB Layout Considerations The CM3109-00SB/SH has a heat spreader attached to the underneath of the PSOP-8 package in order for heat to be transferred much easier from the package to the PCB. The heat spreader is a copper pad of dimensions just smaller than the package itself. By positioning the matching pad on the PCB top layer to connect to the spreader during manufacturing, the heat will be transferred between the two pads. The drawing below shows the recommended PCB layout. Note that there are six vias on either side to allow the heat to dissipate into the ground and power planes on the inner layers of the PCB. Vias can be placed underneath the chip, but this can cause blockage of the solder. The ground and power planes should be at least 2 sq in. of copper by the vias. It also helps dissipation to spread if the chip is positioned away from the edge of the PCB, and not near other heat dissipating devices. A good thermal link from the PCB pad to the rest of the PCB will ensure a thermal link from the CM3109 package to ambient, JA, of around 40C/W.
Figure 17. Recommended Heat Sink PCB Layout
(c) 2004 California Micro Devices Corp. All rights reserved.
10 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 Tel: 408.263.3214
Fax: 408.263.7846
www.calmicro.com
01/15/04
CM3109
Application Information (cont'd)
VCC VDDQ CVDDQ 47uF VDDQSEL BOOTSEL RVDDQSEL 4.7K VDDQ VDDQSEL FSBSEL SD FSBSEL 0.1uF VCC VTT VSENSE GND CVTT 220uF CVCC 47uF GMCHVCCP
GMCH_EN
Figure 18. Typical Front Side Bus with Suspend to RAM Application Circuit The above diagram shows the CM3109 connected to the Intel 865 GMCH Front Side Bus VTT pin GMCHVCCP. The Enable signal GMCH_EN is used to shut down the output of the CM3109 to save power during shutdown periods. The VDDQSEL input ensures that the CM3109 is in Front Side Bus mode, and the BOOTSEL from the GMCH ensures the right Microprocessor VTT voltage is applied.
VCC (CPU Core) GMCH_EN
VDDQSEL "1" Open or "0" Open or "0"
FSBSEL Don't Care "0" "1"
VTT VDDQSEL/2 (see note 1) 1.225V 1.45V
NOTE For DDR For FSB For FSB
GMCHVCCP
Note 1:Assumes VDDQ and VDDQSEL are tied together in DDR application.
Figure 19. Front Side Bus Timing diagram
Table 1: VTT Output Selection Truth Table.
(c) 2004 California Micro Devices Corp. All rights reserved. 01/15/04
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
Tel: 408.263.3214
Fax: 408.263.7846
www.calmicro.com
11
CM3109
Mechanical Details
PSOP-8 Mechanical Specifications Dimensions for CM3109 devices packaged in 8-pin PSOP packages with an integrated heatslug are presented below. For complete information on the PSOP-8 package, see the California Micro Devices PSOP-8 Package Information document. Mechanical Package Diagrams
TOP VIEW
D
8 7 6 5
PACKAGE DIMENSIONS
Package Leads Dimensions A A1 B C D E e H L x** y** # per tube # per tape and reel Millimeters Min 1.30 0.03 0.33 0.18 4.83 3.81 1.02 5.79 0.41 3.56 2.29 Max 1.62 0.10 0.51 0.25 5.00 3.99 1.52 6.20 1.27 4.06 2.79 Min 0.051 0.001 0.013 0.007 0.190 0.150 0.040 0.228 0.016 0.130 0.090 PSOP-8 8 Inches Max 0.064 0.004 0.020 0.010 0.197 0.157 0.050 0.244 0.050 0.150 0.110
H
Pin 1 Marking
E
1
2
3
4
BOTTOM VIEW
D
1 2 3 4 Heat Slug
x Hy
x/2
E
y/2
8
7
6
5
100 pieces* 2500 pieces Controlling dimension: inches
SIDE VIEW
A
SEATING PLANE
A1 B e
END VIEW
* This is an approximate number which may vary.
** Centered on package centerline.
C
L
Package Dimensions for PSOP-8
(c) 2004 California Micro Devices Corp. All rights reserved.
12 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 Tel: 408.263.3214
Fax: 408.263.7846
www.calmicro.com
01/15/04

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